In this position you will be working within the Server Development Group (SDG), developing a ground breaking high performance custom SOC. This is an great opportunity to join a talented team, early in the product lifecycle, as we enter the technology readiness (TR) phase, then move into design and execution (EXE). This program will include innovation in system to achieve performance across a broad scope of system components including computing (core/un-core), interconnect (on-die, on-MCP, off-MCP), silicon technologies, packaging, reliability and system software.
Inside this Business Group
The responsibilities will be tailored to the candidate’s skills and expertise and will include several of the following, but not be limited to: Perform floor-planning and routing studies and implementation Logic synthesis and place and route for SoC blocks Full chip and section level timing analysis Evaluate low power techniques and power reduction opportunities Perform clock distribution design and analysis Drive technical activities of physical design during TR and EXE Review and direct technical aspects of engagement with contingent workforce Qualifications: Minimum Qualifications: BS degree in Electrical Engineering, Computer Engineering or other related field of study with a minimum of 10+ years of relevant experience in SOC/IP physical design or MS degree with 7+ years or PHD with 5+ years of directly related experience with SOC physical design including: Demonstrable experience in RLS Demonstrable experience in floor planning and routing Demonstrable experience in physical design convergence and tape-in Circuit design and feasibility Interconnect design and analysis Computer micro-architecture - translation of architectural specification into physical domain Layout design understanding RTL/Logic design (Verilog, VCS, etc.) Strong written and verbal communication skills Strong analytical ability and problem solving skills Preferred Skills: The ideal candidate will be able to demonstrate the following behaviors: Ability to work independently and at various levels of abstraction Ability to work effectively with both internal and external teams/customers is expected. Ability to mentor other engineers and technically guide them. Capable of working in a high performing team to deliver the results required from the organization. Facilitator of direct and open communication, diversity of opinion, and debate. This is an Intel Federal Position This position involves work on a U.S. Government contract which may impose certain security requirements. The government may require that you certify your citizenship status. If you are not a U.S. citizen, the government may require you to pass a security check before you can be approved to work on the project. Please note that any offer by Intel for this position is conditioned upon meeting and/or passing the U.S. Government's security check requirements should the government impose these requirements.
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.
Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
Click here for more info: http://jobs.intel.com/ShowJob/Id/1417783/SOC-Physical-Design-amp;-Integration-Engineer/
• Post ID: 57481602 akroncanton